Dynamic fine-grain leakage reduction using leakage-biased bitlines
نویسندگان
چکیده
منابع مشابه
Fine-Grain Dynamic Leakage Reduction
Previous work in leakage current reduction for digital circuits can be divided into two main categories: static design-time selection of slow, low-leakage transistors for non-critical paths and dynamic deactivation of fast leaky transistors on critical paths. Leakage power is dominated by critical paths, and hence dynamic deactivation of fast transistors could potentially yield large savings. W...
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ژورنال
عنوان ژورنال: ACM SIGARCH Computer Architecture News
سال: 2002
ISSN: 0163-5964
DOI: 10.1145/545214.545231